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| Patent # | Description |
|---|---|
| US-5,889,658 |
Package assembly for an electronic component A package assembly (70) for encapsulating and vertically surface mounting a semiconductor device such as an accelerometer includes a semiconductor device (40), a... |
| US-5,889,602 |
Optical hinge An optical hinge (20) provides one or more free space optical communication links through the hinge (17) of an instrument (10). The optical links include a... |
| US-5,889,492 |
Method and apparatus for an acquisition-aided Geo-locating subscriber
unit In a telecommunication system (15) with at least one gateway (1), at least one subscriber unit (2), a system controller (3), at least one communication satellite... |
| US-5,889,482 |
Analog-to-digital converter using dither and method for converting
analog signals to digital signals An analog-to-digital converter (100) has a first path (110) with a first sigma-delta modulator (114) which transforms an analog input signal X.sub.0 (111') from... |
| US-5,889,447 |
Ceramic filter with beveled surface A ceramic block filter (100), having a substantially rectangular block of ceramic material having a top (102), bottom (104), and four side surfaces (106, 108,... |
| US-5,889,394 |
Temperature independent current reference A current reference (10) includes first and second connected resistors (R1 and R2), a voltage source (12) independent of a supply voltage (Vdd). The voltage... |
| US-5,889,303 |
Split-Control gate electrically erasable programmable read only memory
(EEPROM) cell An EEPROM cell (32) is formed having a vertical select gate (34) and a horizontal select gate (40). The vertical select gate (34) and the horizontal select gate... |
| US-5,889,211 |
Media compatible microsensor structure and methods of manufacturing and
using the same A media compatible microsensor structure (11) for sensing an environmental condition in a harsh media includes an inorganic protective film (17) covering... |
| US-5,888,901 |
Multilevel interconnection and method for making A structure and a method for connecting multiple interconnect layers on an integrated circuit structure (10) using landed or non-landed vias. An integrated... |
| US-5,888,662 |
Modified electrodes for display devices An organic electroluminescent display device (10) includes a plurality of organic layers (16, 18, and 20) disposed between opposing electrode assemblies (12 and... |
| US-5,888,588 |
Process for forming a semiconductor device A semiconductor device (10) includes a gate electrode (61) having a silicon/tungsten nitride/tungsten silicon nitride/tungsten silicide composition. The tungsten... |
| US-5,888,412 |
Method for making a sculptured diaphragm A sculptured diaphragm of a sensor is fabricated by providing a semiconductor material, forming at least one cavity on the front side of the semiconductor... |
| US-5,888,296 |
Method for making a ferroelectric semiconductor device and a layered
structure A layered bismuth ferroelectric structure (12) and a method for forming the bismuth layered ferroelectric structure (12). A monolayer (12A) of bismuth is formed... |
| US-D407,406 |
Speaker grille |
| US-D407,367 |
Battery for a portable radio |
| US-5,887,265 |
Channel selection for radio communication supportable with repeaters A radio (1) for radio communication supportable with repeaters. The radio (1) has a transceiver (2) for receiving information on either a repeater channel or a... |
| US-5,887,261 |
Method and apparatus for a radio remote repeater in a digital cellular
radio communication system A digital cellular radio communication system having a remote repeater is provided. The communication system includes a central communication site which:... |
| US-5,887,257 |
Hybrid constellation satellite comunication systems and methods with
efficient signaling and control A hybrid constellation satellite communication system (100) is established using two or more satellite types (110, 120) in different constellations. The two or... |
| US-5,887,179 |
System power saving means and method An apparatus (12) and method (80, 120) is described for reducing power consumption in a system (10) having subsystems (34). A controller (40, 40', 40") detects... |
| US-5,887,118 |
Olfactory card An olfactory card (10) comprises a PC card housing (12) and a PC card connector (14) supported by the PC card housing (12). The olfactory card (10) includes a... |
| US-5,887,046 |
Method, system, and device for accumulating data and maintaining the
accumulated data A method of accumulating and maintaining the accumulated data comprises steps of maintaining an intermediate count in a first memory device (12), reading a... |
| US-5,886,998 |
Method and apparatus for interleave/de-interleave addressing in data
communication circuits Interleaving/de-interleaving of data is achieved by storing and subsequently retrieving portions of the data from circular buffers (60,70). The circular buffers... |
| US-5,886,993 |
System, device, and method for sharing contention mini-slots among
multiple priority classes A system, device, and method for sharing contention mini-slots among multiple priority classes determines an aggregate feedback state for each of the priority... |
| US-5,886,972 |
Recording information in a phase change optical medium with a vertical
cavity surface emitting laser An apparatus for changing the phase of an optical storage medium changeable between a reflective phase and a dispersive phase. The apparatus including a... |
| US-5,886,928 |
Non-volatile memory cell and method of programming The programming time of a non-volatile memory cell (13) is reduced by forming the non-volatile memory cell (13) in a well region (12). The presence of the well... |
| US-5,886,926 |
Circuit and method of measuring the negative threshold voltage of a
non-volatile memory cell A portable data carrier (10) embodies an integrated circuit (12) with an EEPROM (24). The EEPROM has a number of rows of memory cells (32, 38) each having... |
| US-5,886,921 |
Static random access memory cell having graded channel metal oxide
semiconductor transistors and method of... An SRAM memory cell (40) uses GCMOS transistors (42, 44, 56, and 58) for improving discharge of complementary bit lines (60 and 62). The GCMOS transistors (42,... |
| US-5,886,920 |
Variable conducting element and method of programming A variable conducting element (10) and method for programming a constant current or constant resistance provided at output terminals (24 and 26) of a... |
| US-5,886,875 |
Apparatus using a circuit board having a frangible portion apparatus A circuit board (10) has a frangible portion (12) for carrying information relating to the circuitry carried on the circuit board. The information is carried in... |
| US-5,886,645 |
Method and apparatus for providing duplicate messages in an
acknowledge-back communication system A communication system (100) for providing information includes transceivers (110) for receiving the information and acknowledging reception of the information... |
| US-5,886,577 |
Apparatus for efficient current amplification Two emitter follower transistors (260, 250), in which each transistor has an emitter coupled to one of the collectors of a differential pair structure (230,... |
| US-5,886,575 |
Apparatus and method for amplifying a signal The apparatus includes an amplifier (204) having an input and an output, the amplifier output coupled to an input of a Doherty amplifier (208). The Doherty... |
| US-5,886,572 |
Method and apparatus for reducing distortion in a power amplifier A method and apparatus for efficient power amplification with low distortion includes an envelope detector (220), a difference amplifier (130), an envelope... |
| US-5,886,562 |
Method and apparatus for synchronizing a plurality of output clock
signals generated from a clock input signal A clock circuit for generating alternate clock phases (P.sub.1, P.sub.2) whose trailing edges define sampling points of an analog-to-digital converter (106).... |
| US-5,886,556 |
Low power schmitt trigger A Schmitt trigger (30) operates at low power and low frequency and can be implemented in a small amount of surface area on an integrated circuit. Specifically,... |
| US-5,886,547 |
Circuit and method of controlling mixer linearity An integrated receiver circuit (10) has a first amplifier (12) coupled for receiving a radio frequency (RFIN) input signal. A mixer (16) has an RF input coupled... |
| US-5,886,464 |
Organic electroluminescent device with emission from hole transporting
layer An organic EL device comprises a cathode, an electron transporting layer (ETL), a hole transporting layer (HTL) and an anode which are laminated in sequence,... |
| US-5,886,400 |
Semiconductor device having an insulating layer and method for making An electrical insulation for a heatsink (14) of a semiconductor device (10) is provided by an insulating layer (16) formed on a desired portion or portions of... |
| US-5,886,396 |
Leadframe assembly for conducting thermal energy from a semiconductor
die disposed in a package A semiconductor die (32) is disposed on a heat sink (22) in an electronic package (10). During assembly, a leadframe (20) is connected to the heat sink (22) by... |
| US-5,886,382 |
Trench transistor structure comprising at least two vertical transistors A method for forming a trench transistor structure begins by forming a buried layers (12 and 16) and a doped well (22) in a substrate (10) via epitaxial growth... |
| US-5,886,374 |
Optically sensitive device and method A process combines a high performance silicon pin diode (60) and other semiconductor devices such as transistors, resistors, and capacitors. The pin diode (60)... |
| US-5,886,362 |
Method of reflowing solder bumps after probe test An integrated circuit die is tested by inserting test probe needles into flat solder pads before reflow. The testing is performed at different temperatures to... |
| US-5,885,870 |
Method for forming a semiconductor device having a nitrided oxide
dielectric layer In one embodiment a non-volatile memory device having improved reliability is formed by oxidizing a first portion of a semiconductor substrate (12) to form a... |
| US-5,885,860 |
Silicon carbide transistor and method A silicon carbide MESFET (10) is formed to have a source (21) and a drain (22) that are self-aligned to a gate (16) of the MESFET (10). The gate (16) is formed... |
| US-5,885,856 |
Integrated circuit having a dummy structure and method of making A pattern of dummy structures (20) is added to the layout pattern of an integrated circuit (10) to equilibrate the polishing rate across the surface of a... |
| US-5,884,772 |
Electronic device having multiple user interface configurations A portable electronic device (100) includes a housing cover (110) having a faceplate location (145), an electronic circuit (115), and a first faceplate (140).... |
| US-5,884,378 |
Method of making an enhanced quality factor resonator A high quality factor resonator (15) including a substrate (110) and a resonator layer (150). The resonator layer includes a first electrode (157). The resonator... |
| US-D407,091 |
Front panel for a wireless communications device |
| US-D407,063 |
Battery housing for a cellular telephone |
| US-5,884,268 |
Method and apparatus for reducing artifacts that result from time
compressing and decompressing speech A processing system time compresses a voice message before transmission, and processing system time expands the message after reception. To process the message... |
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